Chipkill
Chipkill is IBM‘s trademark for a form of advanced (ECC) technology that protects computer memory systems from any single memory chip failure as well as multi-bit errors from any portion of a single memory chip. One simple scheme to perform this function scatters the bits of a Hamming code ECC word across multiple memory chips, such that the failure of any single memory chip will affect only one ECC bit per word. This allows memory contents to be reconstructed despite the complete failure of one chip. Typical implementations use more advanced codes, such as a BCH code, that can correct multiple bits with less overhead.
Chipkill is frequently combined with , so that if a chip fails (or has exceeded a threshold of bit errors), another, spare, memory chip is used to replace the failed chip. The concept is similar to that of , which protects against disk failure, except that now the concept is applied to individual memory chips. The technology was developed by the in the early and middle 1990s. An important feature, Chipkill technology is deployed primarily on , and midrange servers.
An equivalent system from is called Extended ECC, while equivalent systems from are called Advanced ECC and Chipspare. A similar system from Intel, called , provides (DDDC) functionality. Similar systems from , called redundant array of independent NAND (RAIN), and from , called RAISE level 2, protect data stored on SSDs from any single NAND flash chip going bad.
A 2009 paper using data from Google’s datacentres provided evidence demonstrating that in observed Google systems, DRAM errors were recurrent at the same location, and that 8% of DIMMs were affected each year. Specifically, “In more than 85% of the cases a correctable error is followed by at least one more correctable error in the same month”. DIMMs with chipkill error correction showed a lower fraction of DIMMs reporting uncorrectable errors compared to DIMMs with error correcting codes that can only correct single-bit errors. A 2010 paper from also showed that Chipkill memory gave substantially lower memory errors, using both real world memory traces and simulations.